1. Field of the Invention
The present invention relates to an automatic phase control apparatus used for chrominance signal frequency conversion processing in a consumer video cassette recorder (VCR) having a color video signal reproduction function.
2. Description of the Prior Art
Chrominance signal processing in consumer VCRs frequency converts the chrominance signal to a low band signal for recording, and then frequency converts the chrominance signal again during reproduction. The carrier frequency of the low-band converted chrominance signal in VHS-format VCRs is forty times the horizontal scanning frequency in the NTSC system, and 40.125 times the horizontal scanning frequency in the PAL system. Reproduction processing of the low-band converted chrominance signal is executed by an automatic phase control loop ("APC loop" below) generating an oscillation signal of which the frequency and phase are synchronized to the carrier wave of the reproduced low-band converted chrominance signal. One known problem with this APC loop is called "side lock," a phenomenon in which, because the burst signal is an intermittent signal, the APC loop locks even though the APC loop is a frequency that differs by an integer multiple of the horizontal scanning frequency from the carrier frequency of the reproduced low-band converted chrominance signal.
A conventional automatic phase control apparatus is disclosed in Japanese patent laid-open publication number 3-65893, published May 20, 1991. In this apparatus, the continuous wave of the variable frequency oscillator in the APC loop is phase-compared with the continuous wave of the carrier wave in the reproduced low-band converted chrominance signal obtained from the automatic frequency control loop ("AFC loop" below) to detect whether the APC loop has side locked, and if so whether the oscillation frequency of the variable frequency oscillator has Bide locked on the high frequency side relative to the carrier frequency of the reproduced low-band converted chrominance signal, or on the low frequency side. An "increase frequency" or "decrease frequency" signal is then input to the variable frequency oscillator to correct the APC loop from the side locked frequency to the correct frequency synchronization state.
The above method, however, requires an AFC loop circuit for side lock detection, thus increasing the complexity of the circuitry. The side lock correction circuit further comprises a loop consisting of a variable frequency oscillator, phase comparator, and frequency asynchronous detector, and further processing time is required for the loop to be corrected from the side locked state to the normal synchronization state.
Another problem with the APC loop is that when the carrier frequency of the reproduced low-band converted chrominance signal changes rapidly and suddenly during special video playback modes, the APC loop becomes offset from the synchronization state, and the chrominance signal is not reproduced normally until synchronization is restored (i.e., during the transient asynchronization state of the synchronization process). This synchronization process broadly consists of a frequency synchronization process and a phase synchronization process, and the time required to re-synchronize differs according to the transient response characteristics, which are determined by the natural frequency and damping factor of the APC loop. It is also known that if the natural frequency and damping factor of the APC loop are changed to improve the transient response characteristics, the steady characteristics of the synchronization state, including noise characteristics and jitter characteristics, deteriorate.